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make local apic actually local #499
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As described in #495, each CPU core in a SMP x86 system has its own local APIC. Currently, the mycelium HAL's interrupt code will just only ever know about the boot processor's local APIC. This is wrong. This commit reworks this to use the `%GS` local storage mechanism to store the state of the local APIC separately for each CPU core. I've added code for initializing the local APIC state on non-boot processors, which we will call when we bring up other cores. Fixes #495
Currently, we have some code for reading MSRs that emits a tracing event for every `rdmsr` instruction you execute. This was a stupid thing to do, and I only did it because I was being excessively cutesy. Now that we read the `FS_GS_BASE` MSR in ISRs to access local data, this can deadlock the kernel :upside_down: So, this commit removes it.
1 Hz = 1 second. 1 ms = 1/1000 second. So we should multiply here instead of dividing, lol. The divide accidentally makes us consider the LAPIC frequency to be 0, and then we just "don't ever have a timer". Whoopsie.
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The current code for sleeping using the PIT one-shot timer has a bunch of tracing in it. This adds overhead which makes the sleep duration way less accurate, making PIT calibration for the local APIC timer way sloppier. This commit removes the tracing. PIT calibration accuracy still sucks, but it sucks less now.
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This commit changes the local APIC calibration code to attempt PIT calibration even when we find CPUID leaves indicating the frequency. This way, we can cross-check them and see how sloppy the PIT calibration is. It turns out its pretty bad.
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The current code for sleeping using the PIT one-shot timer has a bunch of tracing in it. This adds overhead which makes the sleep duration way less accurate, making PIT calibration for the local APIC timer way sloppier. This commit removes the tracing. PIT calibration accuracy still sucks, but it sucks less now.
hawkw
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The current code for sleeping using the PIT one-shot timer has a bunch of tracing in it. This adds overhead which makes the sleep duration way less accurate, making PIT calibration for the local APIC timer way sloppier. This commit removes the tracing. PIT calibration accuracy still sucks, but it sucks less now.
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for the record, i knew that putting tracing in the PIT sleep functions would trash their accuracy when i wrote that code, but i did it anyway because we weren't actually using it for calibration at the time... |
hawkw
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hawkw
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Dec 31, 2024
As described in #495, each CPU core in a SMP x86 system has its own local APIC. Currently, the mycelium HAL's interrupt code will just only ever know about the boot processor's local APIC. This is wrong. This commit reworks this to use the `%GS` local storage mechanism to store the state of the local APIC separately for each CPU core. I've added code for initializing the local APIC state on non-boot processors, which we will call when we bring up other cores. Fixes #495
hawkw
added a commit
that referenced
this pull request
Dec 31, 2024
Currently, we have some code for reading MSRs that emits a tracing event for every `rdmsr` instruction you execute. This was a stupid thing to do, and I only did it because I was being excessively cutesy. Now that we read the `FS_GS_BASE` MSR in ISRs to access local data, this can deadlock the kernel :upside_down: So, this commit removes it.
hawkw
added a commit
that referenced
this pull request
Dec 31, 2024
1 Hz = 1 second. 1 ms = 1/1000 second. So we should multiply here instead of dividing, lol. The divide accidentally makes us consider the LAPIC frequency to be 0, and then we just "don't ever have a timer". Whoopsie.
hawkw
added a commit
that referenced
this pull request
Dec 31, 2024
This commit changes the local APIC calibration code to attempt PIT calibration even when we find CPUID leaves indicating the frequency. This way, we can cross-check them and see how sloppy the PIT calibration is. It turns out its pretty bad.
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