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feat(gpu): optimize packing keyswitch on gpu #1908

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@andrei-stoian-zama andrei-stoian-zama commented Dec 30, 2024

GPU optimization for packing keyswitch for any level count using GEMM.

Bench using make bench_integer_compression_gpu on GTX 4060 mobile

Bench timing ms latency difference w.r.t previous impl
cuda::packing_compression::pack_u2 1.6173 -35.22%
cuda::packing_compression::pack_u8 1.6211 -31.76%
cuda::packing_compression::pack_u16 1.6316 -32.55%
cuda::packing_compression::pack_u32 1.6345 -38.88%
cuda::packing_compression::pack_u64 1.648 -70.32%
cuda::packing_compression::pack_u128 1.7274 -81.30%
cuda::packing_compression::pack_u256 3.3431 -81.69%
cuda::packing_compression::pack_u512 5.9654 -84.47%

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Performance improvement on H100s is also quite impressive:

Bench timing ms latency difference w.r.t previous impl
cuda::packing_compression::pack_u2 2.4167 -37.42%
cuda::packing_compression::pack_u8 2.4250 -32.89%
cuda::packing_compression::pack_u16 2.4298 -32.18%
cuda::packing_compression::pack_u32 2.4338 -32.20%
cuda::packing_compression::pack_u64 2.4452 -32.26%
cuda::packing_compression::pack_u128 2.4713 -32.88%
cuda::packing_compression::pack_u256 2.6083 -61.40%
cuda::packing_compression::pack_u512 2.6287 -75.61%

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Just some smaller fixes. Although I still want to better understand the algorithm here. Also, let's run some extensive tests to be sure we are not breaking anything before merge.

@@ -31,8 +31,7 @@ __host__ inline bool can_use_pks_fast_path(uint32_t lwe_dimension,
uint32_t polynomial_size,
uint32_t level_count,
uint32_t glwe_dimension) {
// TODO: Generalize to level_count > 1 by transposing the KSK
return level_count == 1;
return true;
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I think now we can get rid of this function, now?


Torus a_i = lwe_in[read_val_idx];

Torus state = init_decomposer_state(a_i, base_log, level_count);

Torus mod_b_mask = (1ll << base_log) - 1ll;
lwe_out[write_val_idx] = decompose_one<Torus>(state, mod_b_mask, base_log);
__syncthreads();
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Can you replace __syncthreads() by synchronize_threads_in_block()? This is obviously not wrong but we are trying to encapsulate some CUDA intrinsics.


Torus a_i = lwe_in[read_val_idx];

Torus state = init_decomposer_state(a_i, base_log, level_count);

Torus mod_b_mask = (1ll << base_log) - 1ll;
lwe_out[write_val_idx] = decompose_one<Torus>(state, mod_b_mask, base_log);
__syncthreads();
lwe_out[write_state_idx] = state;
__syncthreads();
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This line is not needed.


Torus mod_b_mask = (1ll << base_log) - 1ll;

buffer_in[val_idx] = decompose_one<Torus>(state, mod_b_mask, base_log);
__syncthreads();
buffer_in[state_idx] = state;
__syncthreads();
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This line is not needed.

@andrei-stoian-zama andrei-stoian-zama force-pushed the feat/as_optimize_pks_all_levels branch from 9589a09 to e120ed8 Compare January 9, 2025 15:55
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